Peking University Resistive-Switching Random Access Memory (RRAM) Verilog-A Model 2.1.0
The Peking University RRAM Model is a SPICE-compatible compact model which is designed for simulation of metal-oxide based RRAM devices. It captures typical DC and AC electrical behaviors of the RRAM devices with physics-based model descriptions.
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Version 2.1.0 - published on 08 May 2019 doi:10.21981/MAGP-1C19 - cite this Last public release: 2.1.1
Licensed under NEEDS Modified CMC License according to these terms
Description
The Peking University RRAM Model is a SPICE-compatible compact model which is designed for fast and accurate simulation of metal-oxide based RRAM devices. The model captures typical DC and AC electrical behaviors of metal-oxide based RRAM devices with physics-based compact model descriptions. Parasitic effects are also modeled, including both parasitic resistance of switching layer and electrodes, and parasitic MIM capacitance. Intrinsic variation effects such as statistical distributions of resistance states and switching voltages after SET/RESET processes as well as current fluctuations during RESET are supported.
Model Release Components ( Show bundle contents ) Bundle
Peking University Resistive-Switching Random Access Memory (RRAM) Verilog-A Model 2.1.0(VA | 8 KB)
Peking University Resistive-Switching Random Access Memory (RRAM) Verilog-A Model 2.1.0 Benchmarks(ZIP | 2 KB)
Peking University Resistive-Switching Random Access Memory (RRAM) Verilog-A Model 2.1.0 Parameters Description(PDF | 77 KB)- Peking University Resistive-Switching Random Access Memory (RRAM) Verilog-A Model 2.1.0 Manual(PDF | 950 KB)
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Cite this work
Researchers should cite this work as follows:
- Xu, W.; Kang, J. (2019). Peking University Resistive-Switching Random Access Memory (RRAM) Verilog-A Model. (Version 2.1.0). nanoHUB. doi:10.21981/MAGP-1C19