This workshop was first presented at Purdue University on November 18-19, 2014. The workshop materials (PowerPoint slides and homework assignment) are available below. Coming soon are online lectures and an nanoHUB tool that will allow you to perform the homework assignments online.
Abstract: Compact models must get the physics right, work reliably over bias, geometry, and temperature, interact properly with the circuit simulators in which they are implemented, run efficiently, and follow impeccable software development practices. This workshop will be a detailed deep-dive into an industrial strength Verilog-A code for the R3 model for JFETs, diffused resistors, and polysilicon resistors. Do not think that a “resistor” is a trivially simple device to model: real resistors are affected by depletion pinching, velocity saturation, and self-heating, and to properly account for all of these effects, while ensuring no unphysical model behavior, is not trivial. But it is not as complex as a complete MOS or bipolar transistor model – so is ideal as a training vehicle for compact modeling.
Instructor: Dr. Colin McAndrew has been involved in compact modeling of bipolar, MOS, and passive devices for more than 25 years. He received the Ph.D. degree in Systems Design Engineering from the University of Waterloo, Ontario, Canada, in 1984. From 1987 to 1995 he was at AT&T Bell Laboratories, Allentown, PA, and since 1995 he has been with Freescale Semiconductor (formerly Motorola Semiconductor Products Sector), Tempe, AZ, where he is at present a Fellow of Technical Staff. Dr. McAndrew is a Fellow of the IEEE and has served as an Editor of the IEEE Transactions on Electron Devices and on numerous technical program committees. He is co-author of the recently published book, Operation and Modeling of the MOS Transistor, Oxford Univ. Press, 2010.
Who should take this workshop: This workshop is designed for those who are new or still fairly new to compact modeling. Those who have never written a compact model should be prepared to write a “simulation-ready” compact model. Those who have limited experience should learn how to write better models. To benefit most from this workshop, participants should have an elementary acquaintance with the Verilog-A language and the R3 model, as gained from the pre-workshop reading assignment.
Format: The workshop was split over two days, the first afternoon went into details of how to formulate a model correctly, with explanations of the physics, compromises made to maintain accuracy while minimizing computational complexity, and other practical modeling details. Dr. McAndrew dug deep into the code to explain how it works and why it was set up the way it is. Homework was assigned that helped students think deeply about how to overcome seemingly innocuous, but practically critical, problems. On the second day the homework solutions were reviewed and any questions were answered.
Those participating in the online version of this workshop will be able to run the model in the open-source simulator, Xyce and perform the homework assignment.
Pre-reading workshop assignment:
“How to (and how not to) Write a Compact Model in Verilog-A,” Geoffrey Coram, Analog Devices, 2004.
“Robust Parameter Extraction for the R3 Nonlinear Resistor Model for Diffused and Poly Resistors,” Colin C. McAndrew, and Tamara Bettinger, IEEE Trans. on Semiconductor Manufacturing, vol. 25, pp. 555-563, 2012.
“Integrated Resistor Modeling,” Colin McAndrew, Chapter 9 in Compact Modeling: Principles, Techniques, and Applications, Ed. By Gennady Gildenblat, Springer, 2010.