III-V Tunnel FET Model 1.0.1

By Huichu Liu1, Vinay Saripalli1, Vijaykrishnan Narayanan1, Suman Datta1

Penn State University

The III-V Tunnel FET Model is a look-up table based model, where the device current and capacitance characteristics are obtained from calibrated TCAD Sentaurus simulation.

Listed in Compact Models | publication by group NEEDS: Nano-Engineered Electronic Device Simulation Node

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Version 1.0.1 - published on 21 Apr 2015 doi:10.4231/D30Z70X8D - cite this

Licensed under NEEDS Modified CMC License according to these terms

Description

The III-V Tunnel FET Model is a look-up table based model, where the device current and capacitance characteristics are obtained from calibrated TCAD Sentaurus simulation. Verilog-A models for two types of III-V Tunnel FET, InAs Homojunction Tunnel FET and GaSb-InAs Heterojunction Tunnel, are included.

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